The present invention relates to bus control and in particular, but not exclusively, to control of an I2C bus by proxy server with write-through cache.
One application for the present invention relates to high density computer systems, for example, computer server systems for telecommunications applications. In telecommunications applications, it is important to provide high reliability and high capacity of operation. Various approaches have been taken to providing such high-performance, high reliability systems. One factor in providing high reliability is providing an operating environment which is optimised against firmware or software errors during operation. Such errors can include memory allocation errors and conflicts, and illegal instruction sequences. Design of computer systems to minimise the risk of such errors is therefore an integral part of designing high reliability computer systems.
The present invention relates to management of a shared memory resource for high performance without compromising system reliability.